Recently, a treatment using a plasma (hereinafter, referred to as “plasma processing”) such as an etching, sputtering and CVD (chemical vapor deposition) has been employed to be performed on an object to be processed such as a semiconductor wafer (hereinafter, referred to as “wafer”) in a manufacturing process of a semiconductor apparatus.
An apparatus for carrying out such process (shown in FIG. 8) has a processing chamber 800, which is a cylindrical container, for performing a plasma processing on a wafer. The processing chamber 800 includes a chamber sidewall 810, an upper electrode 811 installed at the top of the chamber 800, a lower electrode 812 installed in a lower portion of the processing chamber 800, an ESC (electrostatic chuck) stage 820 and a focus ring 821 mounted on an upper side of the lower electrode 812, and a baffle plate 830 interposed between the chamber sidewall 810 and the lower electrode 812.
The upper electrode 811, which has a plurality of through holes not shown in the drawing, serves as a shower head for introducing a process gas for the plasma processing into the processing chamber 800 through the through holes. The lower electrode 812 is connected to a high frequency power supply 813. The focus ring 821 is made of a ring-shaped member formed to enclose a wafer mounted on the upper side of the ESC stage 820.
The ESC stage 820 includes an ESC electrode 820a embedded in the ESC stage 820 to electrostatically adsorb the mounted wafer onto the ESC stage 820. The ESC electrode 820a is connected to a variable power supply 822 for providing electric power required to adsorb the wafer onto the ESC electrode 820a. 
In the plasma processing apparatus shown in FIG. 8 is formed a plasma region of the plasma generated by a high frequency electric field formed in a space between the upper electrode 811 and the lower electrode 812 as shown in the figure. The plasma processing apparatus performs an etching on, for example, an oxide film already formed on an upper side of the wafer by the generated plasma. The particles detached from an inner wall of the chamber sidewall 810 by the etching float around inside the processing chamber 800. After the etching is completed, the particles are removed by exhausting the processing chamber 800 through a small through hole (not shown) located in the baffle plate 830 by using a pump which is not shown.
Such particles are negatively charged by the electrons in the plasma to float around the plasma region above the wafer during the etching process, and will be attached onto the upper side of the wafer to thereby contaminate the wafer after the plasma production is stopped by completing the etching process.
There are disclosed techniques that can be employed to prevent the particles from being attached onto the upper side of the wafer as described above, wherein the charged particles are actively removed by using another electrode installed in the processing chamber 800 before the plasma generation or after the plasma extinction (for example, References 1 and 2).    (Reference 1) Japanese Patent Laid-open Application No. H10-284471    (Reference 2) European Patent Publication No. 1119030
However, although the particles can be driven from the region above the wafer towards the other electrode before the plasma being generated or after the plasma being extinguished by the techniques described in References 1 and 2, it is not practical to remove the particles while the plasma is being produced because the other electrode causes to generate an abnormal discharge or to produce particles during the plasma generation.
Further, since the particles in the region above the wafer effectively mask the parts to be processed on the wafer to thereby reduce the yield, it is required that these particles have to be purged out of the region above the wafer especially while the plasma is being generated. In addition, by suppressing the yield reduction, the productivity is expected to improve.